Analog Layout Engineer

Title: Analog Layout Engineer

Location: Bangalore (On-site) | WFO - 5 Days | 2 - 7 Yrs of Experience

Job Description

We are looking for a highly skilled Analog / Mixed-Signal Layout Engineer to drive full-custom layout implementation at both block and top levels for advanced-node silicon programs.

This is a hands-on individual contributor role requiring strong layout expertise, attention to detail, and commitment to first-pass silicon success.

Responsibilities

* Design and develop full-custom analog/mixed-signal layouts at block and top level.

* Implement high-performance layouts for circuits such as ADC, DAC, PLL, LDO, Bandgap, voltage/current references, and related AMS IP.

* Ensure clean DRC, LVS, ERC, Antenna, and other physical verification sign-offs.

* Collaborate closely with circuit designers to understand design intent and optimize layout for performance.

* Execute parasitic-aware layout techniques to minimize mismatch and performance degradation.

* Perform parasitic extraction review and drive layout optimization.

* Address EMIR, ESD, and reliability constraints during layout implementation.

* Work independently on complex designs within tight schedules.

Qualification

* Experience in advanced process nodes (7nm / 5nm / 3nm).

* Exposure to high-performance or low-power AMS designs.

* Experience working in ODC or remote team models.

Soft Skills

* Strong ownership mindset and execution discipline.

* Ability to manage multiple deliverables under tight timelines.

* Clear communication and structured documentation practices.

* Commitment to quality and first-pass silicon success.