VLSI CAD Engineer – SoC IP Enablement & Front-End TFM

VLSI CAD Engineer SoC IP Enablement & Front-End TFM (36 Years Experience)

Location: Bangalore (Onsite)

Job Summary

We are looking for a highly motivated and technically strong VLSI CAD Engineer with 36 years of industry experience in Foundation & complex third-party IP enablement, IP collateral management & PPA studies, EDA flow support related to SOC front-end design. The ideal candidate will work closely with SoC design, CAD-Infra, methodology, and EDA vendors to enable robust and scalable IP interface and design flows across multiple projects.

This role requires strong understanding of Foundation and Complex IP components, enablement and integration challenges at different technology nodes, hands-on experience with front-end EDA tools, ability to manage IP collateral, and overall design environment deployment.

Key Responsibilities

• Enable and integrate Foundation IPs and complex third-party IPs into SoC environments. Develop and maintain standard process and infrastructure related to collateral quality, sanity and automated validation.
• Collaborate with Front-end and DFT teams on different Flow and Methodology support areas (E.g. RTL development, lint, CDC/RDC, synthesis, formal verification, and low-power methodologies, DFT stitching)
• Collaborate with design, verification and physical design teams to ensure smooth adoption of design methodologies and flows.
• Collaborate with EDA vendors, Library/IP providers, Foundry interface to solve a range of engineering issues related to Foundation IP, Complex IP and Front-end Flows.
• Participate in methodology improvements and flow qualification for new technology nodes, PPA studies and benchmarking with different IP/Library configurations.
• Support IP packaging, version control, release management, and integration workflows.
• Support Python, Perl, Tcl, Makefile based automation wherever necessary.

Required Skills & Qualifications

Educational Qualification

• B.Tech / M.Tech in:
• Electronics & Communication Engineering (ECE)
• VLSI Design/Microelectronics
• Strong academic background (Tier-1 institutes) is preferred.

Experience

• 36 years of relevant experience in VLSI CAD, handling third-party Foundation and Complex IP eco-system challenges, SoC design enablement, or front-end methodology development.

Technical Skills

• Strong understanding of:
• SoC front-end design flows
• RTL-to-GDSII methodology (front-end focus)
• IP enablement, collateral management and integration
• Hands on experience with relevant Synopsys/Cadence/Siemens tools and flows

Preferred Qualifications

• Experience in complex SoC programs or semiconductor product companies.
• Exposure to advanced technology nodes.
• Knowledge of CI/CD and DevOps concepts applied to semiconductor workflows.
• Good communication and stakeholder coordination skills.

Key Competencies

• Problem-solving mindset
• Strong debugging and analytical skills
• Ownership and accountability
• Process-oriented with strong attention to detail

Why Join Us

• Opportunity to work on cutting-edge SoC programs and advanced semiconductor technologies.
• Exposure to complex IP ecosystems and enterprise-scale CAD infrastructure.
• Collaborative environment with strong focus on innovation and automation.
• Excellent growth opportunities in SOC methodology and CAD engineering.