System-on-Chip Design Engineer

Please find the Job Description below:

Physical Design Lead Engineers.

Qualification: BE/MTECH with 10+ years of experience in SOC Physical Design.

Location- Bangalore

Notice period - Immediate to 90 days (Preferred who can join within 30 days).

Requirements:

• Must hands on experience with a solid complex (SOC/sub-systems/SWRPs) implementation and strong understanding in PG/floorplan and physical design flows and methodologies, place and route using tools such as Innovus & FC
• Strong scripting skills in Innovus- TCL, and Python/Perl(optional)
• Top down floorplan and Power Grid understanding for development methodology is a must
• Experience with signoff convergence(STA, EMIR, PV) of the implemented subsystem
• Block level Timing Signoff and ECO generation
• Block level Power signoff
• Good skill on Automation (Perl/Tcl/Awk/Python
• Able to provide technical guidance to Junior Engineer and lead 4-6 engineers
• Must have led small project team
• Good in communication skill as he/she would be single point of contact for client

I'm looking forward to discussing this opportunity with you and happy to answer any questions you may have regarding the position or the company