STA Engineer

Job Title: STA Engineer

Experience: 612 Years

Location: Bangalore / Hyderabad

Notice Period - Immediate Joiners Prefered

Job Description

We are seeking a skilled STA Engineer with 612 years of experience in Static Timing Analysis and timing closure for complex ASIC designs. The ideal candidate will have strong expertise in constraint development, multi-mode multi-corner (MMMC) analysis, and timing sign-off methodologies.

You will play a critical role in ensuring design performance and reliability by driving timing closure across all scenarios.

Key Responsibilities

• Lead static timing analysis (STA) across multiple modes, corners, and scenarios (MMMC)
• Develop, validate, and manage timing constraints (SDC)
• Drive timing closure and debug setup/hold violations across the design cycle
• Perform detailed timing analysis and generate sign-off quality reports
• Collaborate with synthesis, physical design, and RTL teams to resolve timing issues
• Optimize design for performance, power, and area (PPA)
• Support timing sign-off and ensure design meets all timing requirements

Required Skills

• 612 years of experience in Static Timing Analysis
• Strong understanding of timing concepts, constraints development, and timing closure
• Hands-on experience with STA tools such as PrimeTime, Tempus, or equivalent
• Expertise in multi-mode multi-corner (MMMC) analysis
• Solid understanding of ASIC design flow and timing methodologies
• Experience in debugging timing violations and improving timing QoR
• Familiarity with clock tree concepts, false paths, and multi-cycle paths.