Senior Design Verification Engineer
ACL Digital
5 - 10 years
Bengaluru
Posted: 30/04/2026
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Job Description
Were hiring a Senior Design Verification Engineer at ACL Digital!
Location: Bangalore | Experience: 4+ Years | Notice: 030 Days
Strong expertise in SystemVerilog, UVM & constrained random verification
Hands-on with AXI/AHB/APB, PCIe, Ethernet, USB, I2C/SPI, DDR interfaces
Experience with VCS, QuestaSim/Xcelium, Verdi/DVE, scripting (Python/Perl/Shell)
Skilled in coverage closure, debugging, assertions (SVA), and regression automation
Apply now: janagaradha.n@acldigital.com
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