Physical Design Engineer (IP Block Level)

Role: IP Physical Design (IPPD / PDIP) r

Need IP PD-only profiles, not regular SoC block PD engineers.

Experience should be from IP groups, not from teams that only worked on SoC blocks.

This is a long-term requirement,

Location: Bangalore / Hyderabad Exp:11- 19 Years

- IP is digital-dominant, with analog delivered as hard macros.

- Digital PD engineers must be able to:

- Integrate analog hard IPs

- Handle analogdigital cross-boundary issues

- Understand analog layout DRCs, bump-related PG/PG connectivity

Engineers must have end-to-end IP-level ownership mindset, Strong understanding of full PD flow and signoff. PV support exists as a separate team, but engineers must understand all non-PV signoff aspects.