Field-Programmable Gate Arrays Engineer
HCLTech
2 - 5 years
Bengaluru
Posted: 21/04/2026
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Job Description
About the Company
We HCL TECH are looking for professional who have experience in.
About the Role
Experience working with Synopsys HAPS (HighPerformance ASIC Prototyping System).
Responsibilities
- Proficient in logical partitioning of large designs for FPGA prototyping
- 6+ years of relevant Hands-on experience mapping large ASIC/SoC RTL designs across multiple FPGAs
- Ability to validate and debug the complete SoC functionality on FPGA platforms
Location
Bengaluru/Chennai
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