Design Verification Engineer

Job Title: Verification Engineer HBM (HBM2/HBM2E/HBM3)

Location: Bangalore (BLR)

Company: Silicon Patterns

Experience: 5 to 8 Years

Job Overview

Silicon Patterns is looking for a skilled Verification Engineer with strong experience in HBM (High Bandwidth Memory) protocols HBM2/HBM2E/HBM3. The candidate will be responsible for end-to-end verification of the HBM controller subsystem across multiple protocol layers.

Key Responsibilities

• Author and maintain HBM controller subsystem verification plans
• Cover all protocol layers including:
• PHY interface
• DRAM controller
• AXI/CHI host interface
• Power management
• RAS (Reliability, Availability, Serviceability) features
• Develop and execute SystemVerilog/UVM-based testbenches
• Create test cases, sequences, assertions, and coverage models
• Perform functional and protocol-level verification for HBM designs
• Analyze and debug simulation failures and performance issues
• Achieve coverage closure (functional and code coverage)
• Collaborate with RTL, architecture, and system teams

Required Skills & Qualifications

• Strong experience in HBM2 / HBM2E / HBM3 protocol verification
• Proficiency in SystemVerilog (SV) and UVM methodology
• Experience in subsystem/IP-level verification
• Solid understanding of memory controller architecture
• Knowledge of AXI or CHI protocols
• Experience with assertion-based verification (SVA)
• Hands-on with simulation/debug tools (VCS, Questa, Xcelium, etc.)
• Strong debugging and analytical skills

Preferred Qualifications

• Experience in high-speed memory interfaces or SoC verification
• Understanding of power management and RAS features
• Exposure to formal verification is a plus
• Good communication and teamwork abilities

Why Join Silicon Patterns?

• Work on advanced HBM3 memory technologies
• Opportunity to contribute to cutting-edge semiconductor designs
• Collaborative and growth-focused environment

Interested candidates can share their CV at:

shalini@siliconpatterns.com