Design Verification Engineer

Job Title: Verification Engineer

Location: Bangalore

Experience: 4+Years

Employment Type: Full-time

Job Overview

We are looking for a skilled Verification Engineer to join our hardware design team. You will be responsible for verifying complex digital designs, ensuring functionality, performance, and quality before silicon or product release.

Key Responsibilities

• Develop and execute verification plans for digital designs (ASIC/FPGA/SoC)
• Build reusable verification environments using SystemVerilog and UVM
• Write test cases, assertions, and coverage models
• Perform functional, regression, and performance testing
• Debug and root-cause design and testbench issues
• Collaborate closely with design, architecture, and validation teams
• Analyze coverage metrics and ensure verification completeness
• Participate in design and code reviews

Required Qualifications

• Bachelors or Masters degree in Electronics, Electrical Engineering, or related field
• Strong knowledge of digital design fundamentals
• Experience with SystemVerilog and UVM (Universal Verification Methodology)
• Familiarity with simulation tools (e.g., VCS, QuestaSim, Xcelium)
• Understanding of verification concepts: assertions, coverage, constrained random testing
• Experience in debugging RTL designs

Preferred Qualifications

• Experience with scripting languages like Python, Perl, or Shell
• Knowledge of protocols such as AXI, PCIe, USB, or Ethernet
• Exposure to formal verification tools is a plus
• Experience with FPGA prototyping or emulation platforms