As a member of the CPU Verification team, you will play a critical role in verifying next-generation CPU designs. Your responsibilities will include developing and enhancing verification components such as testbenches, checkers, monitors, and stimulus, as well as performing regression debugging and driving coverage closure. You will collaborate closely with Architecture, Design, and Tools teams to ensure functional correctness and high-quality design delivery. The role involves applying advanced verification methodologies and leveraging AI-driven techniques to improve verification efficiency, scalability, and coverage.
This is your opportunity to make a real impact on the next generation of computing. You will be at the forefront of verifying high-performance CPUs that power enterprise servers, handle data-intensive workloads, and drive supercomputers. Be part of the team building the hardware foundation for tomorrow's AI workloads while ensuring enterprise-grade security.
Develop and execute comprehensive verification plans for CPU designs.
• Design and implement verification environments, including testbenches, checkers, monitors, and stimulus.
• Create and execute directed and constrained-random test scenarios to validate complex processor functionality.
• Perform regression debugging and root-cause analysis of failures.
• Drive functional and code coverage closure to meet quality targets.
• Verify key CPU core and Uncore subsystems such as CPU core units, cache hierarchies, memory subsystems, coherency protocols, Fabric, and I/O.
• Collaborate with architecture, design, and tools teams to debug and resolve functional and performance issues.
• Apply and enhance advanced verification methodologies (e.g., UVM-based verification).
• Leverage automation and AI-driven techniques to improve verification productivity and scalability.
- Strong understanding of computer architecture and processor microarchitecture.
- Proven experience in Verification for one full verification lifecycle (IP to SoC level), with emphasis on complex subsystems.
- Experience in developing verification plans, strategies, and environments for IP and subsystem-level validation.
- Strong programming skills in SystemVerilog and/or C++, along with scripting languages such as Python or Perl.
- Hands-on experience with verification methodologies such as UVM/OVM.
- Familiarity with HDLs such as Verilog or VHDL.
- Experience across multiple levels of verification (unit, subsystem, system-level).
- Proficiency in Linux/Unix environments and version control systems (e.g., Git).
- Understanding of CI/CD workflows and automation in verification
- Strong debugging skills, including waveform analysis and failure triage.
- Experience in driving coverage closure (functional and code coverage).
• Strong ability to design stress tests and identify corner-case scenarios.
• Deep understanding of system-level architecture and performance considerations.
• Experience with IP integration and SoC-level verification.
• Familiarity with software design principles and design patterns.
• Exposure to AI/ML techniques applied to verification workflows.
10 - 15
