Analog Layout Engineer
ACL Digital
2 - 5 years
Hyderabad
Posted: 15/05/2026
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Job Description
Job Role : Analog Layout Engineer
Job Location : Hyderabad
Preference : Immediate /serving notice
Experience : 4 to 8 years
- Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support.
- TSMC 16/12nm,7nm,5nm,3nm and below (other foundries are also fine like Intel, Samsung, GF). Preferably TSMC 5nm/3nm experience.
- Verification flows - LVS/DRC/DFM/Antenna check/EMIR experience.
- Responsible for on-time delivery of block-level layouts of acceptable quality.
- Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must.
- BE or MTech in Electronics/VLSI Engineering
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